Now showing items 1-2 of 2

  • Study and design of rudimentary 32 bits central processing unit.

    T.E.I. of Crete, School of Applied Sciences, Department of Electronic Engineering
    Authors: Kaparos, Emmanouil
    Thesis advisor: Petrakis, Nikolaos
    Publication Date: 08-02-2012
    In this graduation project, was studied the instruction set architecture of MIPS-32 and attemted to implement a small subset, using the hardware description language VHDL.
  • Weighted scheduling in heterogeneous architectures for offloading variable-length kernels.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Pratikakis, Menelaos
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2016-10-14
    Heterogeneous System Architecture (HSA) is a type of computer processor architecture that integrates different processor architectures, for example central processing units and graphics processors, on the same bus with ...