Browsing by Keywords "network on chip"

Now showing items 1-4 of 4

  • Design an efficient router for network on chip design.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Christoforakis, Ioannis
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2018-10-30
    The increased demand for on-chip communication bandwidth as a result of the multi-core trend has made packet switched networks-on-chip (NoCs) a more compelling choice for the communication backbone in next-generation ...

  • Security primitives in a hierarchical GNU/LINUX driver of a hardware NoC firewall.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Piperaki, Paraskevi
    Thesis advisor: Grammatikakis, Miltiadis
    Publication Date: 2019-07-24
    We develop design methodology for implementing and validating hierarchical GNU/Linux security primitives on top of a hardware Network-on-Chip (NoC) Firewall mechanism embedded in an FPGA development board (ARMv7-based ...

  • Network on chip router components development.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Kolympianakis, Filippos-Georgios
    Thesis advisor: Kornaros, Georgios
    Publication Date: 01-11-2012
    In a few years it will be possible for designers to have more than 50 processors and memories of various types in a single chip. A new model for the design of such a system on chip is based upon Network-on-chip (NoC) where ...

  • Supportice software for Network on Chip.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Motakis, Antonios
    Thesis advisor: Kornaros, Georgios
    Publication Date: 17-05-2011
    As the number of components embedded on a piece of silicon increases, so are the bandwidth requirements of a System on Chip. As traditional interconnects no longer meet current and future requirements in terms of performance, ...