Now showing items 1-4 of 4

  • Design an efficient router for network on chip design.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Christoforakis, Ioannis
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2018-10-30
    The increased demand for on-chip communication bandwidth as a result of the multi-core trend has made packet switched networks-on-chip (NoCs) a more compelling choice for the communication backbone in next-generation ...
  • Hardware-assisted workload dispatching in heterogeneous dataflow architectures.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Tomoutzoglou, Othon
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2017-09-15
    In the scope of this thesis, hardware and software mechanisms have been developed for optimizing system-level performance of heterogeneous system architectures in terms of communication with accelerators. These innovative ...
  • Methodology for workload analysis and scheduling on heterogeneous embedded systems.

    T.E.I. of Crete, School of Engineering (STEF), MSc in Informatics and Multimedia
    Authors: Garefalakis, Emmanouil
    Thesis advisor: Kornaros, Georgios
    Publication Date: 27-11-2015
    The shift towards multicore technologies is offering a great potential of computational power for scientific and industrial applications. However, great challenges to software development arise. Performance gains for data ...
  • Weighted scheduling in heterogeneous architectures for offloading variable-length kernels.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Pratikakis, Menelaos
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2016-10-14
    Heterogeneous System Architecture (HSA) is a type of computer processor architecture that integrates different processor architectures, for example central processing units and graphics processors, on the same bus with ...