Now showing items 1-8 of 8

  • Design and implementation of an adaptive high efficiency FPGA-accelerated system for multi-disciplinary application domains.

    H.M.U., School of Engineering (ScENG) MSc in Informatics & Multimedia
    Authors: Leivadaros, Svoronos
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2021-04-07
    The scope of this thesis is the design and implementation of an FPGA platform that utilizes state-of-the-art techniques and methodologies to allow improved energy efficiency and performance in carrying out computationally ...
  • DMA controller for a custom embedded system.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Chiotakis, Spyros
    Thesis advisor: Kornaros, Georgios
    Publication Date: 12-01-2016
    A Direct Memory Access (DMA) Controller offloads a processor from tasks that involve transferring of data inside the computing system. The processor commands the DMA controller to initiate the appropriate transactions. ...
  • Hardware-assisted workload dispatching in heterogeneous dataflow architectures.

    T.E.I. of Crete, School of Engineering (STEF), PPS in Informatics and Multimedia
    Authors: Tomoutzoglou, Othon
    Thesis advisor: Kornaros, Georgios
    Publication Date: 2017-09-15
    In the scope of this thesis, hardware and software mechanisms have been developed for optimizing system-level performance of heterogeneous system architectures in terms of communication with accelerators. These innovative ...
  • Network on chip router components development.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Kolympianakis, Filippos-Georgios
    Thesis advisor: Kornaros, Georgios
    Publication Date: 01-11-2012
    In a few years it will be possible for designers to have more than 50 processors and memories of various types in a single chip. A new model for the design of such a system on chip is based upon Network-on-chip (NoC) where ...
  • Development of distributed memory in embedded multinucleated systems.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Vourvoulakis, Dimitrios; Christodoulou, Panagiotis
    Thesis advisor: Kornaros, Georgios
    Publication Date: 19-02-2015
    The purpose of the thesis, is the development of distributed memory in embedded multinucleated systems. In this case, we will use reprogrammable integrated circuits FPGA's, which will develop distributed memories. In terms ...
  • Cryptography of processed image of embedded systems.

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Vazakopoulou, Kalliopi-Marina
    Thesis advisor: Kornaros, Georgios
    Publication Date: 19-12-2013
    This project focuses on the implementation of ciphers into multicores embedded systems. The outcome between four ciphers into a system of two cores, which is based on a prototype platform of Xilinx is also tested. Moreover ...
  • Methodology for workload analysis and scheduling on heterogeneous embedded systems.

    T.E.I. of Crete, School of Engineering (STEF), MSc in Informatics and Multimedia
    Authors: Garefalakis, Emmanouil
    Thesis advisor: Kornaros, Georgios
    Publication Date: 27-11-2015
    The shift towards multicore technologies is offering a great potential of computational power for scientific and industrial applications. However, great challenges to software development arise. Performance gains for data ...
  • Design and Implementation of an Memory Management Unit (MMU).

    T.E.I. of Crete, School of Engineering (STEF), Department of Informatics Engineering
    Authors: Tympakianakis, Georgios
    Thesis advisor: Kornaros, Georgios
    Publication Date: 25-11-2015
    As the modern world processes larger amounts of data and demand increases for massive amounts of memory, the need of efficient memory management also becomes critical. The aim of this study is to develop and implement a ...